Exploring the SMF 113 Processor Cache Counters and LSPRs
Project and Program: MVS
, MVS Performance
, SHARE in Anaheim 2011
The new SMF 113 measurements record measurements are designed to provide insight into the movement of data and instruction among the processor cache and memory areas. These measurements will be invaluable to help quantify the net effect of everything from turning on HiperDispatch to making critical application change. During this presentation Peter Enrico explain concept of processor caching on zArchitecture processors, the counters available in the SMF 113 record, formulas that make the counters come alive, examples of how the counters could be used.
Presenter(s): Peter Enrico, Enterprise Performance Strategies Inc,
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